The following information is intended to collect together in one place, and explain in relatively simple terms, enough of the details of the RS-232 standard to allow the construction and/or debuggging of interfaces between any two RS-232 compatible devices.
A more detailed coverage of this subject may be found in the book "Technical Aspects of Data Communication" by John E. McNamara (1977, Digital Press).
RS-232C is the most recent version of the EIA (Electronics Industry Association) standard for low speed serial data communication. It defines a number of parameters concerning voltage levels, loading characteristics and timing relationships.
The actual connectors which are almost universally used (DB-25P and DB-25S, rarely called "EIA connectors") are recommended, but not mandatory. Typical practice requires mounting the female (DB-25S) connector on the chassis of communication equipment, and male (DB-25P) connectors on the cable connecting two such devices.
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There are two main classes of RS-232 devices, namely DTE (Data Terminal Equipment), such as terminals, and DCE (Data Communication Equipment), such as modems.
Typically, one only interfaces a DTE to a DCE, as opposed to one DTE to another DTE, or one DCE to another DCE, although there are ways to do the latter two configurations by building non-standard cables.
Rarely if ever are more than two devices involved in a given interface (multidrop is not supported).
A serial port on a computer may be implemented as either DTE or DCE, depending on what type of device it is intended to support.
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RS-232 is intended for relatively short (50 feet or less), relatively low speed (19,200 bits per second or less) serial (as opposed to parallel) communications.
Both asynchronous and synchronous serial encoding are supported. As 'digital' signals (switched D.C. voltage, such as square waves) are used, as opposed to 'analog' signals (continuously varying voltage, such as sine waves) a very wide bandwidth channel (such as direct wire) is required.
A limited bandwidth channel (such as a phone circuit) would cause severe and unacceptable distortion with consequent loss of information.
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RS-232 supports simplex, half-duplex or full-duplex type channels.
In a simplex channel, data will only ever be travelling in one direction, e.g. from DCE to DTE. An example might be a receive only printer.
In a half-duplex channel, data may travel in either direction, but at any given time data will only be travelling in one direction, and the line must be 'turned around' before data can travel in the other direction. An example might be a Bell 201 style modem.
In a full-duplex channel, data may travel in both directions simultaneously. An example might be a Bell 103 style modem.
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Certain of the RS-232 'hand-shaking' lines are used to resolve problems associated with these modes, such as which direction data may travel at any given instant.
If one of the devices involved in an RS-232 interface is a real modem (especially a half-duplex modem), the 'hand-shaking' lines must be supported, and the timing relationships between them are quite important.
These lines are typically much easier to deal with if no modems are involved. In certain cases, these lines may be used to allow one device (which is receiving data at a higher rate than it is capable of processing indefinitely) to cause the other device to pause while the first one 'catches up'.
This use of the hand-shaking lines was not really intended by the designers of the RS-232 standard, but it is a useful by-product of the way such interfaces are typically implemented.
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Much of the RS-232 standard is concerned with support of modems. These are devices which can convert a serial digital data signal into an analogue signal compatible with a narrow bandwidth (e.g. 3.1kHz) channel such as a switched telephone circuit, and back into serial digital data on the other end.
The first process is called MOdulation, and the second process is called DEModulation, hence the term MODEM.
The actual process used (at data rates of up to 1200 bits per second) is FSK (Frequency Shift Keying), in which a constant frequency sine wave (called the 'carrier') is shifted to a slightly higher or slightly lower frequency to represent a logic 0 or logic 1, respectively.
In a half duplex modem, the entire available bandwidth is used for one direction. In a full duplex modem, the available bandwidth is divided into two sub-bands, hence there is both an originate carrier (e.g. for data from the terminal to the computer), and an answer carrier (e.g. for data from the computer to the terminal). The actual frequencies (in Hertz) used on the Bell 103A full duplex modem are:
SIGNAL STATE
ORIGINATE ANSWER
logic 0
SPACE 1180
1850
carrier
1080 1750
logic 1
MARK 980
1650
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For the purposes of the RS-232 standard, a circuit is defined as a continuous wire from one device to the other.
There are 25 circuits in the full specification, less than half of which are at all likely to be found in a given interface.
In the simplest case, a full-duplex interface may be implemented with as few as 3 circuits.
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There is a certain amount of confusion associated with the names of these circuits, partly because there are three different naming conventions (common name, EIA circuit name and CCITT circuit name).
The table below lists all three names, along with the circuit number (which is also the connector pin with which that circuit is normally associated on both ends).
Note that the signal names are from the viewpoint of the DTE (e.g. Transmit Data is data being sent by the DTE, but received by the DCE).
PIN NAME
EIA CCITT DTE
DCE FUNCTION
1 CG
AA
101
---
Chassis Ground
2 TD
BA
103
-->
Transmit Data
3 RD
BB
104 <-- Receive Data 4 RTS CA 105>
Request To Send
5 CTS
CB
106 <-- Clear To Send 6 DSR CC 107 <-- Data Set Ready 7 SG AB 102 Signal Ground 8 DCD CF 109 <-- Data Carrier Detect 9* <-- Pos. Test Voltage 10* <-- Neg. Test Voltage 11 (usually not used) 12+ SCDC SCF 122 <-- Sec. Data Car. Detect 13+ SCTS SCB 121 <-- Sec. Clear To Send 14+ STD SBA 118>
Sec. Transmit Data
15# TC
DB
114 <-- Transmit Clock 16+ SRD SBB 119 <-- Sec. Receive Data 17# RC DD 115 <-- Receive Clock 18 (not usally used) 19+ SRTS SCA 120>
Sec. Request To Send
20 DTR
CD
108.2 -->
Data Terminal Ready
21* SQ
CG
110 <-- Signal Quality 22 RI CE 125 <-- Ring Indicator 23* CH 111>
Data Rate Selector
CI
112 <-- Data Rate Selector 24* XTC DA 113>
Ext. Transmit Clock
25*
--> Busy
In the above, the character following the pin number means:
* rarely used
+ used only if secondary channel implemented
# used only on synchronous interfaces
Additionally, the direction of the arrow indicates which end (DTE or DCE) originates each signal, except for the ground lines (---).
For example, circuit 2 (TD) is originated by the DTE and received by the DCE.
Certain of the above circuits (11, 14, 16, and 18) are used only by (or in a different way by) Bell 208A modems.
A secondary channel is sometimes used to provide a very slow (5 to 10 bits per second) path for return information (such as ACK or NAK characters) on a primarily half duplex channel.
If the modem used suppports this feature, it is possible for the receiver to accept or reject a message without having to turn the line around, a process that usally takes 100 to 200 milliseconds.
On the above circuits, all voltages are with respect to the Signal Ground(SG) line.
The following conventions are used:
Voltage Signal
Logic Control
+3 to +25 SPACE
0
On
-3 to -25 MARK
1
Off
Note that the voltage values are inverted from the logic values (e.g. the more positive logic value corresponds to the more negative voltage).
Note also that a logic 0 corresponds to the signal name being 'true' (e.g. if the DTR line is at logic 0, that is, in the +3 to +25 voltage range, then the Data Terminal IS Ready).
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The following criteria apply to the electrical characteristics of each of the above lines:
| 1) The magnitude of an open circuit voltage shall not exceed 25V. | |
| 2) The driver shall be able to sustain a short to any other wire in the cable without damage to itself or to the other equipment, and the short circuit current shall not exceed 0.5 ampere. | |
| 3) Signals shall be considered in the MARK (logic 1) state when the voltage is more negative than -3V with respect to the Signal Ground. Signals shall be considered in the SPACE (logic 0) state when the voltage is more positive that 3V with respect to the Signal Ground. The range between -3V and 3V is defined as the transition region, within which the signal state is not defined. | |
| 4) The load impedance shall have a DC resistance of less than 7000 ohms when measured with an applied voltage of from 3V to 25V but more than 3000 ohms when measured with a voltage of less than 25V. | |
| 5) When the terminator load resistance meets the requirements of Rule 4 above, and the terminator open circuit voltage is 0V, the magnitude of the potential of that circuit with respect to Signal Ground will be in the 5V to 15V range. | |
| 6) The driver shall assert a voltage between -5V and -15V relative to the signal ground to represent a MARK signal condition. The driver shall assert a voltage between 5V and 15V relative to the Signal Ground to represent a SPACE signal condition. Note that this rule in conjunction with Rule 3 above allows for 2V of noise margin. Note also that in practice, -12V and 12V are typically used. | |
| 7) The driver shall change the output voltage at a rate not exceeding 30 volts per microsecond, but the time required for the signal to pass through the -3V to +3V transition region shall not exceed 1 millisecond, or 4 percent of a bit time, whichever is smaller. | |
| 8) The shunt capacitance of the terminator shall not exceed 2500 picofarads, including the capacitance of the cable. Note that when using standard cable with 40 to 50 picofarads per foot capacitance, this limits the cable length to no more than 50 feet. Lower capacitance cable allows longer runs. | |
| 9) The impedance of the driver circuit under power-off conditions shall be greater than 300 ohms. |
Note that two widely available integrated circuit chips (1488 and 1489) implement TTL to RS232 drivers (4 per chip), and RS232 receivers to TTL (also 4 per chip), in a manner consistent with all of the above rules.
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1 CG Chassis Ground
This circuit (also called Frame Ground) is a
mechanism to
insure that the chassis of the two devices are at the
same
potential, to prevent electrical shock to the operator. Note
that this circuit is not used as the reference for
any of
the other voltages. This circuit is optional. If it is used,
care should be taken to not set up ground loops.
2 TD Transmit Data
This circuit is the path whereby serial data is sent
from
the DTE to the DCE. This circuit must be present if data is
to travel in that direction at any time.
3 RD Receive Data
This circuit is the path whereby serial data is sent
from
the DCE to the DTE. This circuit must be present if data is
to travel in that direction at any time.
4 RTS Request To Send
This circuit is the signal that indicates
that the DTE
wishes to send data to the DCE (note that no such
line is
available for the opposite direction, hence the
DTE must
always be ready to accept data). In normal operation,
the
RTS line will be OFF (logic 1 / MARK). Once the
DTE has
data to send, and has determined that the
channel is not
busy, it will set RTS to ON (logic 0 / SPACE), and await an
ON condition on CTS from the DCE, at which time it may then
begin sending. Once the DTE is through sending,
it will
reset RTS to OFF (logic 1 / MARK). On a
full-duplex or
simplex channel, this signal may be set
to ON once at
initialization and left in that state. Note that some
DCEs
must have an incoming RTS in order to transmit
(although
this is not strictly according to the standard).
In this
case, this signal must either be brought across
from the
DTE, or provided by a wraparound (e.g. from DSR) locally at
the DCE end of the cable.
5 CTS Clear To Send
This circuit is the signal that indicates that the
DCE is
ready to accept data from the DTE. In normal operation, the
CTS line will be in the OFF state. When the DTE asserts RTS,
the DCE will do whatever is necessary to allow data
to be
sent (e.g. a modem would raise carrier, and wait
until it
stabilized). At this time, the DCE would set CTS to
the ON
state, which would then allow the DTE to send data. When the
RTS from the DTE returns to the OFF state, the DCE releases
the channel (e.g. a modem would drop carrier), and then set
CTS back to the OFF state. Note that a typical DTE must have
an incoming CTS before it can transmit. This
signal must
either be brought over from the DCE, or
provided by a
wraparound (e.g. from DTR) locally at the DTE
end of the
cable.
6 DSR Data Set Ready
This circuit is the signal that informs the DTE that the DCE
is alive and well. It is normally set to the ON state by the
DCE upon power-up and left there. Note that a typical
DTE
must have an incoming DSR in order to function
normally.
This line must either be brought over from
the DCE, or
provided by a wraparound (e.g. from DTR) locally at the DTE
end of the cable. On the DCE end of the
interface, this
signal is almost always present, and may be
wrapped back
around (to DTR and/or RTS) to satisfy required signals whose
normal function is not required.
7 SG Signal Ground
This circuit is the ground to which all other voltages
are
relative. It must be present in any RS-232 interface.
8 DCD Data Carrier Detect
This circuit is the signal whereby the DCE informs the
DTE
that it has an incoming carrier. It may be used by the
DTE
to determine if the channel is idle, so that
the DTE can
request it with RTS. Note that some DTEs
must have an
incoming DCD before they will operate. In this case,
this
signal must either be brought over from the DCE, or provided
locally by a wraparound (e.g. from DTR) locally at
the DTE
end of the cable.
15 TC Transmit Clock
This circuit provides the clock for the transmitter section
of a synchronous DTE. It may or may not be running at
the
same rate as the receiver clock. This
circuit must be
present on synchronous interfaces.
17 RC Receiver Clock
This circuit provides the clock for the receiver section of
a synchronous DTE. It may of may not be running at the same
rate as the transmitter clock. Note that both TC and RC are
sourced by the DCE. This circuit
must be present on
synchronous interfaces.
20 DTR Data Terminal Ready
This circuit provides the signal that informs the DCE
that
the DTE is alive and well. It is normally set
to the ON
state by the DTE at power-up and left there. Note
that a
typical DCE must have an incoming
DTR before it will
function normally. This signal must either be brought
over
from the DTE, or provided by a wraparound (e.g. from
DSR)
locally at the DCE end of the cable. On the DTE side of the
interface, this signal is almost always present, and may be
wrapped back around to other circuits (e.g. DSR, CTS and/or
DCD) to satisfy required hand-shaking
signals if their
normal function is not required.
Note that in an asynchronous channel, both ends provide their own internal timing, which (as long as they are within 5% of each other) is sufficient for them to agree when the bits occur within a single character.
In this case, no timing information need be sent over the interface between the two devices.
In a synchronous channel, however, both ends must agree when the bits occur over possibly thousands of characters. In this case, both devices must use the same clocks.
Note that the transmitter and receiver may be running at different rates.
Note also that BOTH clocks are provided by the DCE. When one has a synchronous terminal tied into a synchronous port on a computer via two synchronous modems, for example, and the terminal is transmitting, the terminal's modem supplies the Transmit Clock, which is brought directly out to the terminal at its end, and encodes the clock with the data, sends it to the computer's modem, which recovers the clock and brings it out as the Receive Clock to the computer.
When the computer is transmitting, the same thing happens in the other direction.
Hence, whichever modem is transmitting must supply the clock for that direction, but on each end, the DCE device supplies both clocks to the DTE device.
All of the above applies to interfacing a DTE device to a DCE device.
In order to interface two DTE devices, it is usually sufficient to provide a 'flipped' cable, in which the pairs (TD, RD), (RTS,CTS) and (DTR,DSR) have been flipped.
Hence, the TD of one DTE is connected to the RD of the other DTE, and vica versa.
It may be necessary to wrap various of the hand-shaking lines back around from the DTR on each end in order to have both ends work.
In a similar manner, two DCE devices can be interfaced to each other.
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An RS-232 break-out box is particularly useful in solving interfacing problems.
This is a device which is inserted between the DTE and DCE.
Firstly, it allows you to monitor the state of the various hand-shaking lines (light on = signal ON / logic 0), and watch the serial data flicker on TD and/or RD.
Secondly, it allows you to break the connection on one or more of the lines (with dip-switches), and make any kind of cross-connections and/or wraparounds (with jumper wires).
Using this, it is fairly easy to determine which line(s) are not functioning as required and quickly build a prototype cable that will serve to interface the two devices.
At this point, the break-out box can be removed and a real cable built that performs the same function.
An example of this kind of device is available from BlackBox.
Care should be taken with this type of device to connect the correct end of it to the DTE device, or the lights and switches do not correspond to the actual signals.
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© Electron Parametrics Ltd 2002. This document may be reproduced in whole or in part provided that this copyright notice is reproduced on each copy made.
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